The present invention relates to the manufacture of semiconductor-on-insulator (SOI) structures using improved substrate compositions and improved processes for making the SOI structures.
Semiconductor on insulator devices are becoming more desirable as market demands continue to increase. SOI technology is becoming increasingly important for high performance thin film transistors (TFTs), solar cells, and displays, such as, active matrix displays. SOI structures may include a thin layer of semiconductor material, such as silicon, on an insulating material. The processing temperatures during SOI fabrication and during post processing (e.g., during fabrication of TFTs) may be limited by the SOI base materials, such as the substrate material.
Existing glass substrate materials for some SOI applications have a strain point of about 650° C. This strain point limits the aforementioned processing and post-processing temperatures to which the SOI structure may be subject, which may also result in undesirable characteristics in the ultimate SOI device, depending on the particular device application. One such fabrication process for an SOG (semiconductor-on-glass) device is an annealing process employed to remove hydrogen ions (or other ions, such as hydrogen plus helium ions) remaining from earlier implantation processes. A strain point of about 650° C. for ions) remaining from earlier implantation processes. A strain point of about 650° C. for the glass substrate will limit at least the speed and/or quality of the ion reduction process. In addition to strain point requirement the glass substrate must be fusion formable to be commercially viable.
Post processing, such as during the formation of TFTs may also be adversely affected by the limits on the strain point of the glass substrate. High electron mobility (for rapid switching) and significant TFT uniformity across large areas are desirable properties in a resulting SOG device (such as an active matrix LCD). Irrespective of whether the semiconductor material of the SOG is, for example, polysilicon or single crystal silicon, the processing methods require relatively high temperatures, e.g., substantially greater than 650° C., such as about 690° C. or higher. These TFT fabrication processes typically consist of successive deposition and patterning of thin films using significantly elevated temperatures. This may result in the glass substrate being heated to temperatures in excess of 650° C. or higher.
Various ways of obtaining SOI structures include epitaxial growth of silicon (Si) on lattice matched substrates. An alternative process includes the bonding of a single crystal silicon wafer to another silicon wafer on which an oxide layer of SiO2 has been grown, followed by polishing or etching of the top wafer down to, for example, a 0.05 to 0.3 micron layer of single crystal silicon. Further methods include ion-implantation methods in which either hydrogen or oxygen ions are implanted either to form a buried oxide layer in the silicon wafer topped by Si in the case of oxygen ion implantation or to separate (exfoliate) a thin Si layer to bond to another Si wafer with an oxide layer as in the case of hydrogen ion implantation.
The former two methods have not resulted in satisfactory structures in terms of cost and/or bond strength and durability. The latter method involving hydrogen ion implantation has received some attention and has been considered advantageous over the former methods because the implantation energies required are less than 50% of that of oxygen ion implants and the dosage required is two orders of magnitude lower.
U.S. Pat. No. 5,374,564 discloses a process to obtain a single crystal silicon film on a substrate using a thermal process. A silicon wafer having a planar face is subject to the following steps: (i) implantation by bombardment of a face of the silicon wafer by means of ions creating a layer of gaseous micro-bubbles defining a lower region of the silicon wafer and an upper region constituting a thin silicon film; (ii) contacting the planar face of the silicon wafer with a rigid material layer (such as an insulating oxide material); and (iii) a third stage of heat treating the assembly of the silicon wafer and the insulating material at a temperature above that at which the ion bombardment was carried out. The third stage employs temperatures sufficient to bond the thin silicon film and the insulating material together, to create a pressure effect in the micro-bubbles, and to cause a separation between the thin silicon film and the remaining mass of the silicon wafer. (Due to the high temperature steps, this process does not work with lower cost glass substrates.)
U.S. Pat. No. 7,176,528 discloses a process that produces an SiOG structure. The steps include: (i) exposing a silicon wafer surface to hydrogen ion implantation to create a bonding surface; (ii) bringing the bonding surface of the wafer into contact with a glass substrate; (iii) applying pressure, temperature and voltage to the wafer and the glass substrate to facilitate bonding therebetween; (iv) cooling the structure to a common temperature; and (v) separating the glass substrate and a thin layer of silicon from the silicon wafer.
The resulting SOI structure just after exfoliation might exhibit excessive implantation damage of the silicon layer (e.g., due to the formation of an amorphized silicon layer) and residual implantation ions (such as hydrogen). A limitation on the strain point of the substrate material (in this case glass) will correspondingly limit the speed and/or quality of the ion removal process through annealing. Similarly, the strain point limitation may also limit the post-processing temperatures (e.g., during TFT fabrication), thereby impacting device performance characteristics.
Accordingly, there is a need in the art for new methods and apparatus for the manufacture of SOI structures, which permit elevated processing temperatures.